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Keysight Showcases AI Design Solutions at DesignCon 2026


Keysight Showcases AI Design Solutions at DesignCon 2026
  • by: Source Logo
  • |
  • February 10, 2026

Keysight Technologies will demonstrate a comprehensive suite of solutions at DesignCon 2026 to support AI system design, interoperability validation, and large-scale performance testing, addressing challenges in advanced packaging, chiplets, high-speed interfaces, and emerging AI fabrics to help engineers de-risk designs and accelerate deployment.

Quick Intel

  • Keysight will exhibit at Booth 1039 in the Santa Clara Convention Center from February 24-26, 2026, showcasing end-to-end solutions for AI infrastructure validation.
  • Demonstrations cover chiplet and 3D IC design workflows, signal integrity at 3.2T speeds, next-generation memory validation for DDR5 and GDDR7, PCIe 7.0 PAM4 performance, 448 Gbps pathfinding, 1.6T interconnect benchmarking, and UALink/Scale-Up Ethernet compliance.
  • The company will participate in 16 paper, panel, and tutorial sessions, plus nine talks at the Keysight Educational Forum on February 25 in the Great America K Ballroom.
  • Solutions focus on overcoming physical limits, ensuring compliance, improving BER/FEC measurement, and validating AI workloads at system scale.
  • Keysight's tools enable early de-risking of designs, faster time-to-market, and confidence in high-performance AI interconnects and fabrics.
  • The event highlights Keysight's role in advancing AI-driven innovation across semiconductor, interconnect, and networking technologies.

Advancing AI Infrastructure Validation

Keysight Technologies will present its latest innovations in AI system design and validation at DesignCon 2026, providing engineers with tools to tackle the complexities of high-speed data movement in AI-driven applications. From advanced packaging and chiplet interconnects to PCIe, memory, and USB4 validation, the demonstrations illustrate how Keysight solutions address signal integrity challenges, ensure compliance, and support reliable performance at scale.

Key Demonstrations for High-Speed AI Design

Several live demonstrations will highlight cutting-edge capabilities:

  • Chiplet 3D Interconnect Designer — Showcases a complete workflow for multi-die interconnect development in AI and high-performance devices, accelerating design cycles for complex 3D IC architectures.
  • Signal Integrity at 3.2T Speeds — Pairs the Physical Layer Test System (PLTS2026) with the NA5307A Frequency Extender (250 GHz) to deliver the bandwidth and accuracy required for next-generation infrastructure validation, reducing time-to-market.
  • Next Generation Memory Validation — Features live DDR5 system validation for mainstream electrical testing and GDDR7 PAM3 signal integrity analysis with the new SNDR and jitter measurement suite, streamlining compliance and debug processes.
  • Reliable PCIe PAM4 Performance — Demonstrates next-generation PCIe 7.0 test solutions using the UXR-Series oscilloscope, M8050A BERT platform, and PCIe test software for electrical (PHY) and protocol-layer validation, improving margin analysis and link reliability.
  • 448 Gbps Pathfinding — Utilizes the M8199B arbitrary waveform generator and N1046A electrical channel module to generate and analyze PAM4, PAM6, and PAM8 signals, enabling evaluation of modulation trade-offs for future interconnects.
  • 1.6T Interconnects for AI Networks — Uses the Keysight INPT-1600GE benchtop test system to validate BER, FEC, link quality, and AI workload benchmarking, ensuring performance and reliability at scale.
  • UALink and Scale-Up Ethernet for AI Infrastructure — Presents automated test workflows, expanded measurement coverage, and streamlined calibration for 1.6T-class electrical networking interfaces, supporting conformance and debug.

These demonstrations collectively equip engineers to overcome physical layer limitations, validate emerging AI fabrics, and achieve confidence in system-scale performance while accelerating deployment timelines.

Educational Contributions at DesignCon

Keysight will actively contribute to the conference program through 16 paper, panel, and tutorial presentations, as well as nine dedicated talks at the Keysight Educational Forum on February 25 in the Great America K Ballroom. These sessions will provide deep insights into high-speed design challenges, AI infrastructure validation, and best practices for next-generation technologies.

About Keysight Technologies

At Keysight, we inspire and empower innovators to bring world-changing technologies to life. As an S&P 500 company, we're delivering market-leading design, emulation, and test solutions to help engineers develop and deploy faster, with less risk, throughout the entire product life cycle. We're a global innovation partner enabling customers in communications, industrial automation, aerospace and defense, automotive, semiconductor, and general electronics markets to accelerate innovation to connect and secure the world.

  • KeysightDesign Con2026AI System DesignHigh Speed Validation
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