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ChipAgents Helps eMemory Cut NVM IP Verification Effort by 80%


ChipAgents Helps eMemory Cut NVM IP Verification Effort by 80%
  • by: Business Wire
  • |
  • September 22, 2026

eMemory deployed ChipAgents to automate critical portions of functional-model verification for its NeoFuse non-volatile memory IP, reducing the engineering effort for datasheet analysis and verification-testbench construction by approximately 80%, from an estimated four days to five hours. ChipAgents automatically generated a functional-model verification plan and Universal Verification Methodology testbench, helping eMemory increase verification test patterns by 18%.

ChipAgents processed 10 NeoFuse datasheets in eMemory's internal datasheet format with zero mismatches and detected all 15 intentionally introduced datasheet errors with zero false positives.

Quick Intel

  • eMemory deploys ChipAgents agentic AI for NeoFuse OTP NVM IP functional-model verification
  • Cuts datasheet analysis and testbench construction effort by 80% from four days to five hours
  • Increases verification test patterns by 18% and improves functional coverage by 5%
  • Processes 10 datasheets with 120 tables, figures and timing diagrams with zero mismatches vs spec database
  • Detects all 15 intentionally introduced datasheet errors with zero false positives
  • Addresses scaling challenge as eMemory delivers 40+ IP products monthly with small verification team

Why Functional-Model Verification Challenge Drives Agentic AI Adoption

The deployment addresses a growing semiconductor engineering challenge: scaling the volume and complexity of IP development without proportionally increasing engineering resources. eMemory delivers more than 40 IP products each month with a small, dedicated functional-model verification team. The traditional process required engineers to manually interpret datasheets, identify inconsistencies, and build verification testbenches, work that was time-consuming, difficult to reuse and vulnerable to human error and implementation bias.

"Semiconductor companies are being asked to develop more products and more complex designs without a corresponding increase in engineering resources," said William Wang, Founder and CEO of ChipAgents. "eMemory demonstrates what becomes possible when AI agents move beyond code generation and deliver full-flow engineering outcomes. By automating the path from datasheet analysis through testbench generation, ChipAgents helped eMemory dramatically reduce manual engineering effort while expanding verification coverage."

How ChipAgents Automates Datasheet to UVM Testbench Workflow

eMemory deployed a ChipAgents-based agentic AI workflow on NeoFuse, its production one-time-programmable OTP NVM IP. The workflow automates three stages of functional-model verification: Datasheet Recognition, which extracts structured information from datasheets; Datasheet Quality, which identifies inconsistencies and documentation errors; and Testbench Generation, which automatically generates verification plans and UVM testbenches. Machine-readable rule decks guide agent actions throughout the process to help ensure consistent and repeatable results.

In testing, ChipAgents processed 10 NeoFuse datasheets in eMemory's internal datasheet format, containing 120 tables, figures and timing diagrams, and recorded zero mismatches when comparing extracted information with eMemory's internal specification database. The system also detected all 15 intentionally introduced datasheet errors, including parameter inconsistencies, spelling errors, and missing descriptions, with zero false positives.

ChipAgents then used the datasheet information to automatically generate a functional-model verification plan and UVM testbench. The generated verification environment identified additional scenarios that had not previously been considered, increasing test patterns by 18%.

"ChipAgents has gone beyond serving as an AI evaluator for eMemory's behavioral model," said Max Yeh, CAD Director at eMemory. "It has also enabled our engineers to significantly enhance the quality and reliability of our IP datasheets."

Beyond the controlled NeoFuse evaluation, eMemory deployed ChipAgents' Datasheet Quality workflow across 100 manually edited production datasheets. The system identified five documentation issues, primarily spelling and unit-notation inconsistencies, demonstrating how agentic AI can help engineering teams surface such issues before they propagate further into the development process.

The eMemory deployment points to an industry-wide shift in semiconductor engineering: agentic AI is moving beyond code generation to orchestrating complex, cross-domain workflows end to end. These workflows often require multiple engineers to interpret technical documentation, apply specialized design rules, and translate specifications into verification-ready assets. By automating more of this reasoning and execution with AI, engineering teams can shorten design cycles, improve verification consistency, and free engineers to focus on the highest-value decisions required to bring increasingly complex chips to market.

 

About eMemory Technology Inc.

eMemory is a leading global provider of logic-based non-volatile memory (NVM) silicon IP. Founded in Taiwan in 2000, the company provides a comprehensive portfolio of OTP, MTP, embedded Flash, emerging memory, and hardware security technologies for semiconductor designs across advanced and mature process nodes. Working closely with major foundries worldwide, eMemory's silicon IP is widely adopted in AI, HPC, automotive, mobile, IoT, and other advanced semiconductor applications. Through its subsidiary PUFsecurity, eMemory also provides PUF-based hardware security solutions anchored directly in silicon.

About ChipAgents

ChipAgents is an Agentic AI platform that transforms specifications and code into production-ready RTL, verification assets, and automated root-cause analysis, dramatically shortening design and verification cycles. Founded in 2024, the company brings autonomous AI Agents into production semiconductor workflows, serving both design and verification engineers and embedded systems teams at leading semiconductor companies worldwide. The company is headquartered in Santa Clara, California.

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