Cadence, in collaboration with NVIDIA, has introduced a groundbreaking advancement in power analysis for billion-gate AI designs. The new Cadence Palladium Dynamic Power Analysis (DPA) App, built on the Palladium Z3 Enterprise Emulation Platform, achieves up to 97 percent accuracy in analyzing billions of cycles within hours, enabling energy-efficient AI and machine learning (ML) chip designs.
Cadence and NVIDIA launch Palladium DPA App for AI chip power analysis.
Analyzes billion-gate AI designs with 97% accuracy in 2-3 hours.
Leverages Palladium Z3 Platform for hardware-accelerated power profiling.
Enhances energy efficiency for AI, ML, and GPU-accelerated applications.
Integrates with Cadence’s tools for end-to-end design optimization.
Accelerates time to market for energy-efficient semiconductor designs.
The complexity of modern AI and ML chips poses significant challenges for power analysis, as traditional tools struggle to scale beyond a few hundred thousand cycles without impractical timelines. Cadence and NVIDIA have overcome this with the Palladium DPA App, which uses hardware-assisted power acceleration and parallel processing to analyze billion-gate designs in just two to three hours. “Cadence and NVIDIA are building on our long history of introducing transformative technologies developed through deep collaboration,” said Dhiraj Goswami, corporate vice president and general manager at Cadence.
The Palladium DPA App delivers up to 97 percent accuracy in estimating power consumption under real-world workloads, enabling designers to optimize functionality, power usage, and performance before tapeout. This is critical for AI, ML, and GPU-accelerated applications, where early power modeling prevents costly over- or under-designs. “As the era of agentic AI and next-generation AI infrastructure rapidly evolves, engineers need sophisticated tools to design more energy-efficient solutions,” said Narendra Konda, vice president, Hardware Engineering at NVIDIA.
Integrated into Cadence’s broader analysis and implementation suite, the DPA App supports power estimation, reduction, and signoff throughout the design process. This holistic approach ensures semiconductor and system developers can create energy-efficient designs while accelerating time to market, addressing the growing demand for sustainable AI infrastructure.
Cadence and NVIDIA’s collaboration marks a significant leap in AI chip development, offering unprecedented precision and speed in power analysis. The Palladium DPA App empowers designers to create energy-efficient, high-performance chips, driving innovation in the AI-driven economy.
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies.
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