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Ana González on Bridging GPUs and Photonics for AI Scale

  • March 25, 2026
  • Network Monitoring & Management
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Ana González on Bridging GPUs and Photonics for AI Scale

At what point do more GPUs stop making a difference?

Ana González, VP of Business Development for iPRONICS, explains why interconnect performance is now the real limiter of AI scale. From network inefficiencies to energy trade-offs, she outlines how photonics could change the equation.


Where are the real infrastructure pressure points as AI clusters scale?

At this scale, the limiting factor is less about “how many GPUs can we buy” and more about how efficiently we can connect and power them. The big pressure points are the network, the power budget per rack, and how quickly the system can adapt when something changes. One very practical constraint is copper cabling: as speeds go up, copper links can only run short distances reliably. That makes it hard to keep expanding a single, tightly connected “scale-up” domain, and eventually you hit a point where you can’t just add more GPUs in the same domain without redesigning the whole layout. And reliability becomes a business issue, not just an engineering one. AI jobs are highly synchronized, so if one link or one box has a problem, a huge number of GPUs can end up waiting. In the worst case, you lose hours of work and have to restart. So the winners will be the ones who build networks that scale cleanly, stay within power limits, and recover fast when inevitable faults happen.

 

What changes when interconnect performance dictates AI system scale?

Right now, interconnect performance is the practical limiter on how big an AI system can get. If GPUs can’t share data efficiently enough, adding more stops pays off. To break through that, we need a step-change in interconnect technology, for example, moving more of the fabric to photonics, so performance can keep scaling without an energy penalty. In the end, power consumption should be the real limit to scale, not the network technology.

 

Where does photonics fit in the AI architecture?

Photonics is already part of today’s AI architecture in the scale-out network: the long connections are fiber. The issue is that the switching is still electronic, which means the signal keeps getting converted from optical to electrical and back again. Those conversions require a lot of transceivers, and they consume a lot of power. A major opportunity to cut power is to replace electrical switching with optical switching in the scale-out domain. And on the scale-up side, bringing fiber and optical switching closer to the GPUs is what will let a single GPU domain grow beyond today’s copper-limited boundaries.

 

How do optical interconnects change the power, latency, and efficiency equation?

Optical interconnects change the equation because they can take a lot of “wasted work” out of the network. Today, the system burns power and adds delay every time traffic is forced through electronic switching and repeated optical-to-electrical conversions. Moving switching into the optical layer cuts that overhead and helps keep more of the data path in optics, which improves power efficiency at scale. Just as important, optical circuit switches (OCSs) add reconfiguration capabilities: when a link degrades or a component fails, you can rewire connectivity quickly so the job keeps running. In AI workloads, a small fault can leave many GPUs waiting; faster reconfiguration reduces that unutilized time and drives a big step up in overall efficiency.

 

What photonic capabilities are deployable today vs. early stage?

MEMS-based switches are the most mature option today, and they’re already being deployed at meaningful scale in data-center networks. We focus on the next generation of optical circuit switching: silicon photonics (SiPh) OCS. It’s earlier than MEMS, but it’s moving quickly from proofs of concept into real customer trials because it can reduce form factor and cost per port, and it has a strong path to scaling performance and functionality. In parallel, you’re also seeing the ecosystem push co-packaged optics into mainstream platforms, with Broadcom and NVIDIA as good examples, bringing optics closer to the switch silicon to reduce the number of pluggables and the power they burn.

 

How important is software in software-defined photonics?

It’s essential. Without software, photonics is basically static hardware: you get whatever the device gives you, and small manufacturing variations can shift performance. With software control, you turn the photonic building blocks into something you can tune and reconfigure, so you can hit the performance you need while staying within a tight power budget. In our case, we’re bringing telemetry and programmability all the way down to the Layer 1 hardware, so the physical network can be observed, tuned, and reconfigured in real time. That’s also what makes the system operable at scale: built-in telemetry and control loops let you monitor health, spot degradation early, and react faster to failures.

 

What ecosystem shifts are needed for photonics to scale?

Three things. First, you need true high-volume silicon photonics manufacturing maturity in tier-1 foundries (TSMC-level processes), and that’s already happening. Second, you need the manufacturing and packaging capabilities to build these systems at scale: high-throughput fiber attach to the silicon photonics chip edge, plus robust electrical packaging and test. Third, you need the ecosystem to converge on how this gets deployed and operated, with standard control and monitoring interfaces and a clear integration point in the network. We’re already working on standardizing OCS control interfaces across vendors through the Open Compute Project (OCP).

 

What will separate AI infrastructure leaders from laggards?

Leaders will design AI infrastructure as a system, not a pile of GPUs. They’ll be able to increase computing capacity while holding power flat, or even reducing power per unit of compute, by optimizing for performance per watt and treating the interconnect as critical infrastructure. They’ll also build in reconfiguration and resilience so failures don’t leave large GPU pools sitting idle. Laggards will keep scaling the same way they always have, adding compute first and treating the network and power as afterthoughts, until cost and energy become the bottleneck.

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Dr. Ana González is currently VP of Business Development at iPRONICS. Former R&D Manager at EPIC (European Photonics Industry Consortium), she has a solid network in the photonic industry with extensive experience reaching out to commercial partners and new adopters of PIC technologies. Her expertise lies in the development of optical systems for telecom and datacom.

She received her bachelor’s degree in chemistry from the University Autonomous of Barcelona (UAB) and her PhD degree from the Catalan Institute of Nanoscience and Nanotechnology (ICN2).

More about Ana:

iPRONICS has pioneered the field of software-defined photonics. The company presents the first optical circuit switch able to offer low latency, low cost, and low power to accelerate optical transformation of AI cluster communications and future-proofing data center infrastructure.

Founded in 2019 as a spinoff of Universitat Politècnica de València, it was the result of multiple years of research. The team has pioneered the field of programmable photonics and developed the first general-purpose photonic processor capable of programming high-speed light signals on-chip with unprecedented flexibility.

Learn more at ipronics.com